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MPC8280 Datasheet(PDF) 488 Page - Freescale Semiconductor, Inc

No. de pieza MPC8280
Descripción Electrónicos  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Fabricante Electrónico  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 488 Page - Freescale Semiconductor, Inc

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Memory Controller
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
11-68
Freescale Semiconductor
11.6.3
Clock Timing
Fields in the RAM word specify the value of the various external signals at each clock edge. The signal
timing generator causes external signals to behave according to the timing specified in the current RAM
word. Figure 11-58 and Figure 11-59 show the clock schemes of the UPMs in the memory controller for
integer and non-integer clock ratios. The clock phases shown reflect timing windows during which
generated signals can change state. If specified in the RAM, the value of the external signals can be
changed after any of the positive edges of T[1–4], plus a circuit delay time as specified in the Hardware
Specifications.
NOTE
For integer clock ratios, the widths of T1/2/3/4 are equal, for a 1:2.5 clock
ratio, T1 = 4/3*T2 and T3 = 4/3*T4, and for a 1:3.5 clock ratio, the ticks
widths are T1 = 3/2*T2 and T3 = 3/2*T4.
Figure 11-58. Memory Controller UPM Clock Scheme for Integer Clock Ratios
CLKIN
T1
T2
T3
T4



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