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MPC8280 Datasheet(PDF) 279 Page - Freescale Semiconductor, Inc

No. de pieza MPC8280
Descripción Electrónicos  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Fabricante Electrónico  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 279 Page - Freescale Semiconductor, Inc

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The 60x Bus
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
Freescale Semiconductor
8-3
Figure 8-1. Single-MPC8280 Bus Mode
NOTE
In single-MPC8280 bus mode, the MPC8280 uses the address bus as a
memory address bus. Slaves cannot use the 60x bus signals because the
addresses have memory timing, not address tenure timing.
8.2.2
60x-Compatible Bus Mode
The 60x-compatible bus mode can include one or more potential external masters (for example, an L2
cache, an ASIC DMA, a high-end processor that implements the PowerPC architecture, or a second
MPC8280). When operating in a multiprocessor configuration, the MPC8280 snoops bus operations and
maintains coherency between the primary caches and main memory. Figure 8-2 shows how an external
processor is attached to the MPC8280.
TS
A[0–31]
TT[0–4]
TSIZ[0–3]
TBST
CI
WT
GBL
AACK
ARTRY
DBG
D[0–63]
DP[0–7]
TA
TEA
MPC8280
I/O
MEM
Latch &
DRAM MUX
Memory Control Signals
APE



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