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4
Architecture Details
Differential Analog Inputs
The AL1101 inputs are self-biased to MID potential. Input signals larger than maximum levels
(
±4V differential, or +0.5V to +4.5V at the pin) and smaller than supply voltages are output-
limited to maximum positive and negative levels in the digital section (7FFFFFH and 800000H
respectively).
The digital section of the AL1101 compensates for the passband amplitude deviation of an
external single-pole 80kHz anti-alias filter (@ Fs=48k, scaling with Fs).
To remove high-
frequency noise at the differential inputs, the capacitor between the differential inputs should be
located as close as possible to the input pins.
Single-Ended Input Conditioning Circuit
4700p
*
220Ω
2.2k
GND
+
-
+
2.2k
-
2.2k
10µ
GND
4.4k
-
+
To ADC
Input
10µ
220Ω
GND
8Vpp
MID
4Vpp
4Vpp
MID
*Note: Position capacitor as close to pins as possible.
Film or high quality ceramic capacitor suggested.
If decreasing component count is an important factor, and a decrease in performance
specifications is acceptable, the AL1101 inputs may be driven unbalanced with a simple passive
component conditioning circuit. The lowpass filter has fc = 72kHz.
Unbalanced Input Conditioning Circuit
*Note: Position capacitor as close to pins as possible.
Film or high quality ceramic capacitor suggested.
The AL1101 can properly receive input logical “1” voltages of 0.55VD. This means the AL1101
can interface directly with logic signals supplied from 3.3V systems.
No special interface
circuitry is required.
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