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32G431 Datasheet(PDF) 138 Page - STMicroelectronics

No. de pieza 32G431
Descripción Electrónicos  Arm® Cortex®-M4 32-bit MCUFPU, 170 MHz /213 DMIPS,up to 128 KB Flash, 32 KB SRAM, rich analog, math accelerator
PDF  198 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

32G431 Datasheet(HTML) 138 Page - STMicroelectronics

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Electrical characteristics
STM32G431x6 STM32G431x8 STM32G431xB
138/198
DS12589 Rev 6
tSETTLING
Settling time (full scale: for
a 12-bit code transition
between the lowest and the
highest input codes when
DAC_OUT reaches final
value)
VDDA<2,7V
With One comparator
on DAC output
10%-90%
-
16
88
ns
5%-95%
-
21
116
1%-99%
-
33
181
32lsb
-
40
196
1lsb
-
64
332
VDDA<2,7V
With One comparator
and OPAMP on DAC
output
10%-90%
-
24
128
5%-95%
-
32
170
1%-99%
-
49
265
32lsb
-
57
284
1lsb
-
93
483
tWAKEUP(2)
Wakeup time from off state
(setting the ENx bit in the
DAC Control register) until
final value ±1 LSB
Normal mode CL ≤ 10 pF
-
1.4
3.5
µs
PSRR
VDDA supply rejection ratio
VDD > 2.7 V
65
85
-
dB
VDD <2.7 V
40
85
-
tSAMP
Sampling time in sample
and hold mode (code
transition between the
lowest input code and the
highest input code when
DACOUT reaches final
value ±1LSB)
-
-
0.7
-
µs
CIint
Internal sample and hold
capacitor
--
4
5
pF
dV/dt (hold
phase)
Voltage decay rate in
Sample and hold mode,
during hold phase
CSH = 4 pF
T = 55°C
-50
-
mV/ms
IDDA(DAC)
DAC consumption from
VDDA
No load, middle code (0x800)
-
-
0.2
µA
IDDV(DAC)
DAC consumption from
VREF+
No load, middle code (0x800)(3)
-720
955
1. Guaranteed by design.
2. In buffered mode, the output can overshoot above the final value for low input code (starting from min value).
3. Worst case consumption is at code 0x800.
Table 70. DAC 15MSPS characteristics(1) (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit



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