| Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
ES9842PRO Datasheet(PDF) 119 Page - ESS Technology,Inc |
|
|
|||||||||||||||||||||||||||||
ES9842PRO Datasheet(HTML) 119 Page - ESS Technology,Inc |
|
119 / 167 page ![]() VERSION 0.5 ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM ES9842 PRO Product Datasheet 119 ADC CH1 Registers Register 101: ADC CH1 DATAPATH CONTROL Bits [7] [6] [5:3] [2] [1] [0] Default 1'b0 1'b0 3'b000 1'b0 1'b0 1'b0 Bits Mnemonic Description [7] ADC1_BYPASS_FIR2X • 1'b0: Non-bypass (default) • 1'b1: Bypass DFIR_2x [6] ADC1_BYPASS_FIR4X • 1'b0: Non-bypass (default) • 1'b1: Bypass DFIR_4x [5:3] RESERVED NA [2] ADC1_ENABLE_DC_BLOCKING Enables DC blocking path. • 1'b0: Disabled (default) • 1'b1: Enabled [1] RESERVED NA [0] ADC1_NEG_SEL Inverts data input from analog ADC. • 1'b0: No inversion (default) • 1'b1: Inverts input data Register 102: ADC CH1 THD COMP CONFIG Bits [7:2] [1] [0] Default 6'd0 1'b0 1'b0 Bits Mnemonic Description [7:2] ADC1_CORRECTION_ADDR Selects the address when writing the THD compensation RAM. [1] ADC1_CORRECTION_WE Enables writing to the THD compensation RAM. • 1'b0: Writing disabled (default) • 1'b1: Writing enabled [0] ADC1_ENABLE_THD_COMP Enables the THD compensation on ADC CH1. • 1'b0: Disabled and bypassed (default) • 1'b1: Enabled |
|
Enlace URL |
| ¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Enlace a la hoja de datos | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |