HC705C9AGRSSLASHD datasheet(112/157 Pages) NXP

No. de pieza	HC705C9AGRS/D

Descripción Electrónicos	General Release Specification

PDF	157 Pages

Scroll/Zoom	100%

Fabricante Electrónico	NXP [NXP Semiconductors]

Página de inicio	http://www.nxp.com

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112 / 157 page

General Release Speciﬁcation

Introduction

MC68HC05K3 — Rev. 2.0

Instruction Set

11.2 Introduction

The MCU instruction set has 62 instructions and uses eight addressing

modes. The instructions include all those of the M146805 CMOS Family

plus one more: the unsigned multiply (MUL) instruction. The MUL

instruction allows unsigned multiplication of the contents of the

accumulator (A) and the index register (X). The high-order product is

stored in the index register, and the low-order product is stored in the

accumulator.

11.3 Addressing Modes

The CPU uses eight addressing modes for flexibility in accessing data.

The addressing modes provide eight different ways for the CPU to find

the data required to execute an instruction. The eight addressing modes

are:

•

Inherent

•

Immediate

•

Direct

•

Extended

•

Indexed, no offset

•

Indexed, 8-bit offset

•

Indexed, 16-bit offset

•

Relative

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC705C9AGRS/D Datasheet(PDF) 112 Page - NXP Semiconductors