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STM32U545NET3QTR Datasheet(PDF) 243 Page - STMicroelectronics |
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STM32U545NET3QTR Datasheet(HTML) 243 Page - STMicroelectronics |
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243 / 283 page  DS14216 Rev 1 243/283 STM32U545xx Electrical characteristics 258 Figure 47. MDF timing diagram tSUCKI Data setup time with respect to MDF_CKIx input In SLAVE SPI mode, measured on rising and falling edge 1.5 - - ns tHDCKI Data hold time with respect to MDF_CKIx input 0- - tSUCCKI Data setup time with respect to MDF_CCK[1:0] input In SLAVE SPI mode: MDF_CCK[1:0] configured in input, measured on rising and falling edge 1.5 - - tHDCCKI Data hold time with respect to MDF_CCK[1:0] input 0.5 - - tSUCCKO Data setup time with respect to MDF_CCK[1:0] output In MASTER SPI mode: MDF_CCK[1:0] configured in output, measured on rising and falling edge 3.5 - - tHDCCKO Data hold time with respect to MDF_CCK[1:0] output 1.5 - - tSUCCKOLF Data setup time with respect to MDF_CCK[1:0] output In LF_MASTER SPI mode, MDF_CCK[1:0] configured in output, measured on rising and falling edge 19.5 - - tHDCCKOLF Data hold time with respect to MDF_CCK[1:0] output 0- - 1. Evaluated by characterization. Not tested in production. 2. Tmdf_proc_ck is the period of the MDF processing clock. Table 119. MDF characteristics(1) (continued) Symbol Parameter Conditions Min Typ Max Unit MSv69125V1 MDF_SDIx (I) MDF_CKIx (I) MDF_CCK (I/O) tSUCKI tSUCCKI tSUCCKO tSUCCKOLF fCKI, fCCKI, FCCKO, fCCKOLF tLCKI, tLCCKI, tLCCKO tHDCKI tHDCCKI tHDCCKO tHDCCKOLF tHCKI, tHCCKI, tHCCKO tSUCKI tSUCCKI tSUCCKO tSUCCKOLF tHDCKI tHDCCKI tHDCCKO tHDCCKOLF |
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