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KSZ9567RTXI-TR Datasheet(PDF) 225 Page - Microchip Technology |
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KSZ9567RTXI-TR Datasheet(HTML) 225 Page - Microchip Technology |
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225 / 232 page ![]() 2017-2019 Microchip Technology Inc. DS00002329D-page 225 KSZ9567R FIGURE 8-3: PACKAGE (LAND PATTERN) RECOMMENDED LAND PATTERN Dimension Limits Units C2 Center Pad Width Contact Pad Spacing Center Pad Length Contact Pitch Y2 X2 10.50 10.50 MILLIMETERS 0.40 BSC MIN E MAX 15.40 Contact Pad Length (X128) Contact Pad Width (X128) Y1 X1 1.54 0.20 Microchip Technology Drawing C04-2418B NOM 128-Lead Thin Quad Flatpack (6XX) - 14x14x1.0 mm Body [TQFP] 1 2 128 C1 Contact Pad Spacing 15.40 Contact Pad to Contact Pad (X124) G1 0.20 Thermal Via Diameter V Thermal Via Pitch EV 0.33 1.20 BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Dimensioning and tolerancing per ASME Y14.5M For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during reflow process 1. 2. For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: With 10x10 mm Exposed Pad E C1 C2 X2 Y2 X1 EV PIN 1 INDEX ØV EV Y1 SILK SCREEN G1 3 |
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