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KSZ9567RTXI-TR Datasheet(PDF) 209 Page - Microchip Technology |
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KSZ9567RTXI-TR Datasheet(HTML) 209 Page - Microchip Technology |
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209 / 232 page ![]() 2017-2019 Microchip Technology Inc. DS00002329D-page 209 KSZ9567R 6.4.2.3 MII Receive Timing in PHY Mode FIGURE 6-4: MII RECEIVE TIMING IN PHY MODE TABLE 6-5: MII RECEIVE TIMING IN PHY MODE VALUES Symbol Description Min Typ Max Units tP (100BASE-TX / 10BASE-Te) RX_CLK period 40/400 ns tWL (100BASE-TX / 10BASE-Te) RX_CLK pulse width low 20/200 ns tWH (100BASE-TX / 10BASE-Te) RX_CLK pulse width high 20/200 ns tOD RX_DV, RXD_[3:0] output delay from rising edge of RX_CLK 20 ns |
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