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KSZ9567RTXI-TR Datasheet(PDF) 195 Page - Microchip Technology

No. de pieza KSZ9567RTXI-TR
Descripción Electrónicos  7-Port Gigabit Ethernet Switch with Audio Video Bridging and Two RGMII/MII/RMII Interfaces
PDF  232 Pages
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Fabricante Electrónico  MICROCHIP [Microchip Technology]
Página de inicio  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

KSZ9567RTXI-TR Datasheet(HTML) 195 Page - Microchip Technology

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 2017-2019 Microchip Technology Inc.
DS00002329D-page 195
KSZ9567R
5.3.3.3
Reserved Multicast Address Table Entry 2 Register
5.3.4
VLAN TABLE
An internal VLAN Table is used for VLAN lookup. If 802.1Q VLAN mode is enabled (Switch Lookup Engine Control 0
Register), this table will be used to retrieve the VLAN information that is associated with the ingress packet. The table
holds 4096 entries - one for each possible VLAN. The table must be set up before 802.1Q VLAN is enabled. The VLAN
table is accessed one entry at a time using the following indirect registers:
• VLAN Table Entry 0 Register
• VLAN Table Entry 1 Register
• VLAN Table Entry 2 Register
• VLAN Table Index Register
• VLAN Table Access Control Register
The table data fields are described in Figure 5-4 and Table 5-4.
Address:
0x0424 - 0x0427
Size:
32 bits
Bits
Description
Type
Default
31:30
RESERVED
R/W
00b
29:7
RESERVED
RO
0x000000
6:0
PORT FORWARD
Each bit corresponds to a device port.
Bit 0 is for port 1
Bit 1 is for port 2, etc.
1 = Forward to the corresponding port
0 = Do not forward to the corresponding port
R/W
0x00
FIGURE 5-4:
VLAN TABLE STRUCTURE
PORT FORWARD
FILTER ID
PORT UNTAG
MSTP INDEX
PRIORITY
FORWARD OPTION
VALID
Entry # 0
Entry # 4095
Entry # 4094
Entry # 1
Entry # 2
Entry # 3
Entry # 4
V FO PRIORITY MSTP FID UNTAG FORWARD



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