| Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
LSM6DSRX Datasheet(PDF) 116 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
LSM6DSRX Datasheet(HTML) 116 Page - STMicroelectronics |
|
116 / 171 page ![]() 11.40 EMB_FUNC_ODR_CFG_B (5Fh) Finite State Machine output data rate configuration register (r/w) Table 260. EMB_FUNC_ODR_CFG_B register 0(1) 1(2) 0(1) FSM_ODR1 FSM_ODR0 0(1) 1(2) 1(2) 1. This bit must be set to '0' for the correct operation of the device. 2. This bit must be set to '1' for the correct operation of the device Table 261. EMB_FUNC_ODR_CFG_B register description FSM_ODR[1:0] Finite State Machine ODR configuration: (00: 12.5 Hz; 01: 26 Hz (default); 10: 52 Hz; 11: 104 Hz) 11.41 EMB_FUNC_ODR_CFG_C (60h) Machine Learning Core output data rate configuration register (r/w) Table 262. EMB_FUNC_ODR_CFG_C register 0(1) 0(1) MLC_ODR1 MLC_ODR0 0(1) 1(2) 0(1) 1(2) 1. This bit must be set to '0' for the correct operation of the device. 2. This bit must be set to '1' for the correct operation of the device. Table 263. EMB_FUNC_ODR_CFG_C register description MLC_ODR[1:0] Machine Learning Core ODR configuration: (00: 12.5 Hz; 01: 26 Hz (default); 10: 52 Hz; 11: 104 Hz) LSM6DSRX EMB_FUNC_ODR_CFG_B (5Fh) DS13007 - Rev 3 page 116/171 |
|
Enlace URL |
| ¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Enlace a la hoja de datos | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |