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D301 Datasheet(PDF) 305 Page - Microchip Technology |
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D301 Datasheet(HTML) 305 Page - Microchip Technology |
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305 / 416 page ![]() 2016-2018 Microchip Technology Inc. DS30010118D-page 305 PIC24FJ256GA705 FAMILY FIGURE 24-3: 12-BIT A/D CONVERTER ANALOG INPUT MODEL EQUATION 24-1: A/D CONVERSION CLOCK PERIOD CPIN VA Rs ANx ILEAKAGE RIC 250 Sampling Switch RSS CHOLD AVSS = 40 pF 500 nA Legend: CPIN VT ILEAKAGE RIC RSS CHOLD = Input Capacitance = Threshold Voltage = Leakage Current at the pin due to = Interconnect Resistance = Sampling Switch Resistance = Sample/Hold Capacitance Various Junctions Note: The CPIN value depends on the device package and is not tested. The effect of CPIN is negligible if Rs 2.5 k. (RSS 3 k) AVDD VT = 0.6V VT = 0.6V SS – S/H + = S/H Input Capacitance Sampling Switch RMIN RMAX AVDDMIN AVDD (V) AVDDMAX TAD = TCY (ADCS + 1) ADCS = – 1 TAD TCY Note: Based on TCY = 2/FOSC; Doze mode and PLL are disabled. |
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