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SN012020 Datasheet(PDF) 25 Page - Texas Instruments |
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SN012020 Datasheet(HTML) 25 Page - Texas Instruments |
25 / 40 page 12.2 Layout Example xx xx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxx xxxxxxx OUT + OUT - Via to Ground Plane Top Layer Ground Plane Top Layer Traces Pad to Top Layer Ground Plane xx xx Decoupling capacitor placed as close as possible to the device Via to Bottom Layer xxxxx xxxxx xxxx xxxx xxx xxx xx xx xx xx xx xx 2.2µH xx xx Bottom Layer Traces Via to Power Supply Plane xx xx xx xx xx xxxx xx A1 B1 C1 D1 A2 C2 D2 A3 B3 C3 D3 A4 B4 C4 D4 B2 - IN IN + ENB END AGC GAIN 10µF 10µF 0.1µF Input capacitors placed as close as possible to the device Differential Routing of input and output signals is recommended OUT + Decoupling capacitor placed as close as possible to the device TPA2015D1 Figure 12-2. TPA2015D1 Layout Example www.ti.com TPA2015D1 SLOS638C – NOVEMBER 2011 – REVISED JUNE 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 25 Product Folder Links: TPA2015D1 |
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