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STM32H723VG Datasheet(PDF) 185 Page - STMicroelectronics

No. de pieza STM32H723VG
Descripción Electrónicos  32-bit Arm® Cortex®-M7 550 MHz MCU, up to 1 MB Flash memory, 564 KB RAM, 35 comms peripherals and analog interfaces
PDF  227 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
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STM32H723VG Datasheet(HTML) 185 Page - STMicroelectronics

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DS13313 Rev 2
185/227
STM32H723xE/G
Electrical characteristics
208
6.3.33
Parallel synchronous slave interface (PSSI) characteristics
Unless otherwise specified, the parameters given in Table 99 and Table 100 for PSSI are
derived from tests performed under the ambient temperature, fHCLK frequency and VDD
supply voltage summarized in Table 12: General operating conditions.
Table 99. PSSI transmit characteristics(1)
1. Guaranteed by characterization results.
Symbol
Parameter
Min
Max
Unit
-
Frequency ratio
PSSI_PDCK/fHCLK
-0.4
-
PSSI_PDCK
PSSI Clock input
-50
MHz
-
35(2)
2. This value is obtained by using PA9, PA10 or PH4 I/O.
Dpixel
PSSI Clock input duty cycle
30
70
%
tov(DATA)
Data output valid time
-
10
ns
--
-
14(2)
toh(DATA)
Data output hold time
4.5
-
tov((DE)
DE output valid time
-
10
toh(DE)
DE output hold time
4
-
tsu(RDY)
RDY input setup time
0
-
th(RDY)
RDY input hold time
0
-
Table 100. PSSI receive characteristics(1)
1. Guaranteed by characterization results.
Symbol
Parameter
Min
Max
Unit
-
Frequency ratio
PSSI_PDCK/fHCLK
-0.4
-
PSSI_PDCK
PSSI Clock input
-
110
MHz
Dpixel
PSSI Clock input duty cycle
30
70
%
tsu(DATA)
Data input setup time
1.5
-
ns
th(DATA)
Data input hold time
0.5
-
tsu((DE)
DE input setup time
2
-
th(DE)
DE input hold time
1
-
tov(RDY)
RDY output valid time
-
15
toh(RDY)
RDY output hold time
5.5
-



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