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VR4102 Datasheet(PDF) 124 Page - NEC

No. de pieza VR4102
Descripción Electrónicos  64/32-bit Microprocessor
PDF  701 Pages
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Fabricante Electrónico  NEC [NEC]
Página de inicio  http://www.nec.com/
Logo NEC - NEC

VR4102 Datasheet(HTML) 124 Page - NEC

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CHAPTER 5 MEMORY MANAGEMENT SYSTEM
124
5.2.6 Supervisor-mode Virtual Addressing
Supervisor mode is designed for layered operating systems in which a true kernel runs in Kernel mode, and the
rest of the operating system runs in Supervisor mode.
All of the suseg, sseg, xsuseg, xsseg, and csseg spaces are referenced via TLB. Whether cache can be used or
not is determined by bit C of each page’s TLB entry.
The processor operates in Supervisor mode when the Status register contains the following bit-values:
— KSU = 01
— EXL = 0
— ERL = 0
In conjunction with these bits, the SX bit in the Status register selects 32- or 64-bit Supervisor mode addressing:
— When SX = 0, 32-bit supervisor space is selected.
— When SX = 1, 64-bit supervisor space is selected.
Table 5-2 lists the characteristics of the Supervisor mode segments.



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