STM8S datasheet(180/467 Pages) STMICROELECTRONICS

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16-bit advanced control timer (TIM1)

RM0016

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DocID14587 Rev 14

Re-directing OCiREF to OCi or OCiN

In output mode (forced, output compare, or PWM), OCiREF can be re-directed to the OCi or

OCiN outputs by configuring the CCiE and CCiNE bits in the corresponding TIM1_CCERi

registers. This means bypassing the deadtime generator which allows a specific waveform

(such as PWM or static active level) to be sent on one output while the complementary

output remains at its inactive level. Alternative possibilities are to have both outputs at

inactive level or both outputs active and complementary with deadtime.

Note:

When only OCiN is enabled (CCiE = 0, CCiNE = 1), it is not complemented and becomes

active as soon as OCiREF is high. For example, if CCiNP = 0 then OCiN = OCiREF. On the

other hand, when both OCi and OCiN are enabled (CCiE = CCiNE = 1), OCi becomes active

when OCiREF is high whereas OCiN is complemented and becomes active when OCiREF

is low.

Six-step PWM generation for motor control

When complementary outputs are implemented on a channel, preload bits are available on

the OCi M, CCi E and CCi NE bits. The preload bits are transferred to the active bits at the

commutation event (COM). This allows the configuration for the next step to be

programmed in advance and for configuration of all the channels to be changed at the same

time. The COM event can be generated by software by setting the COMG bit in the

TIM1_EGR register or by hardware trigger (on the rising edge of TRGI).

A flag is set when the COM event occurs (COMIF bit in the TIM1_SR register) which can

generate an interrupt (if the COMIE bit is set in the TIM1_IER register).

Figure 76 shows the behavior of the OCi and OCi N outputs when a COM event occurs, for

three different examples of programmed configurations.

STM8S Datasheet(PDF) 180 Page - STMicroelectronics