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DSP56857 Datasheet(PDF) 598 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 598 Page - Freescale Semiconductor, Inc |
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598 / 662 page ![]() Application: Date: Programmer: Sheet Appendix B - Programmer’s Sheets, Rev. 4 Freescale Semiconductor B-96 Preliminary 2 of 10 TOD Clock Scaler (TODCSL) TOD Bits Name Description 15 - 0 TODSCL Time-of-Day Clock Scaler Setting this field to X divides the TOD Input Clock frequency by X + 1 to produce the time-base clock used for incrementing the counters. The clock generation system and this scaler must be configured so the time-base clock is precisely 1Hz for correct operation of the TOD module as the seconds counter increments with each time-base clock. This register is always readable. It accepts writing only when TODEN = 0. TOD Clock Scaler Register (TODCSL) $1FFFC0 + $1 Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read TIME -OF-DAY CLOCK SCALER Write Reset 0000000000000000 |
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