DSP56857 datasheet(516/662 Pages) FREESCALE

No. de pieza	DSP56857

Descripción Electrónicos	Digitial Signal Controller

PDF	662 Pages

Scroll/Zoom	100%

Fabricante Electrónico	FREESCALE [Freescale Semiconductor, Inc]

Página de inicio	http://www.freescale.com

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516 / 662 page

Application:

Date:

Programmer:

Sheet

5685X Digital Signal Controller User Manual, Rev. 4

B-14

Freescale Semiconductor

1 of 4

Bits

Name

Description

LCK1

Lock 1 Status

This bit shows the status of the lock detector state for the LCK1 circuit.

PLL not locked

PLL locked

LCK0

Lock 0 Status

This bit shows the status of the lock detector state for the LCK0 circuit.

PLL not locked

PLL locked

SEL

Clock Source Select

This bit is used to control the source of the master clock to the SIM.

Oscillator output selected (default)

PLL output selected

6 - 5

LCK1_IE

Lock 1 Interrupt Enable

This is an optional interrupt bit.

Disable interrupt (default)

Enable interrupt on rising edge of LCK1

Enable interrupt on falling edge of LCK1

Enable interrupt on any edge of LCK1

OCCS

CGM Control Register (CGMCR)

CGM Control

$1FFF10 + $0

Bits

Read

LCK1 LCK0 SEL

LCK1_IE

LCK0_IE

LCKON TOD_SEL PDN

Write

Reset

000000

denotes Reserved Bits

See the following page for continuation of this register

DSP56857 Datasheet(PDF) 516 Page - Freescale Semiconductor, Inc

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