L9679P datasheet(217/272 Pages) STMICROELECTRONICS

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L9679P

System voltage diagnostics

271

15.1

Analog to digital algorithmic converter

The device hosts an integrated 10 bit Analog to Digital converter, running at a clock

frequency of 16 MHz. The ADC output is processed by a D to D converter with the following

functions:



Use of trimming bits to recover additional gain error due to resistor dividers mismatch;



Digital low-pass filtering;



Conversion from 12 to 10 bits.

10 bits data are filtered inside the digital section. The number of samples that are filtered

vary depending on the chosen conversion. As per Section 7.3.2, the number of used

samples in converting DC sensor, squib or temperature measurements defaults to 8. The

number of samples for all other measurements defaults to 4. The sample number can be

configured by accessing the SYS_CFG register. After low pass filter, the residual total error

is ±4 LSB. This error figure applies to the case of a ideal reference voltage: the spread of

reference voltage causes a proportional error in the conversion output. The reference

voltage of the ADC is set to 2.5 V.

The conversion time is comprised of several factors: the number of measurements loaded

into the queue, the number of samples taken for any one measurement, and the various

settling times. An example of conversion time calculation for a full ADC request queue is

reported in Figure 69. The timings reported in Figure 69 are nominal ones, min/max values

can be obtained by considering the internal oscillator frequency variation reported in the DC

characteristics section.

Figure 69. ADC conversion time

L9679P Datasheet(PDF) 217 Page - STMicroelectronics