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CXD1958Q Datasheet (PDF) - Sony Corporation

CXD1958Q Datasheet PDF - Sony Corporation
No. de pieza CXD1958Q
Descarga  CXD1958Q Descarga

Tamaño del archivo   332.34 Kbytes
Page   48 Pages
Fabricante Electrónico  SONY [Sony Corporation]
Página de inicio  http://www.sony.co.jp
Logo SONY - Sony Corporation
Descripción Electrónicos MMDS TCM/QAM Demodulator FEC ADC

CXD1958Q Datasheet (PDF)

Go To PDF Page Descarga Datasheet
CXD1958Q Datasheet PDF - Sony Corporation

No. de pieza CXD1958Q
Descarga  CXD1958Q Click to download

Tamaño del archivo   332.34 Kbytes
Page   48 Pages
Fabricante Electrónico  SONY [Sony Corporation]
Página de inicio  http://www.sony.co.jp
Logo SONY - Sony Corporation
Descripción Electrónicos MMDS TCM/QAM Demodulator FEC ADC

CXD1958Q Datasheet (HTML) - Sony Corporation

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CXD1958Q Detalles de producto

Description
The CXD1958Q is an integrated TCM/QAM demodulator for MMDS systems using the DAVIC MMDS standard. This highly integrated device incorporates an internal 8-bit ADC, image rejection and root-raised cosine filters, all-digital symbol timing recovery PLL, adaptive decision feedback equalizer (DFE) with 10 feedforward and 30 feedback taps, 4-D TCM decoder, and DAVIC/DVB compliant forward error correction comprising (204,188) Reed Solomon decoder, a programmable de-interleaver with I = 12 and I = 204, and a de-randomiser. All internal clocks are generated from a single external 30MHz reference crystal.

Features
• DAVIC MMDS V1.1 and V1.3 compliant
• Supports 16, 64 and 256QAM
• Supports 16, 64 and 256 TCM
• Internal 8-bit ADC
• Interface for 10-bit external ADC
• 36.125MHz nominal IF input
• Symbol rate range 5 – 5.304Mbaud in 6MHz channels
• Integrated matched filtering with 0.15 roll-off factor
• ±400KHz internal carrier offset compensation with negligible losses @ 5Mbaud 6MHz channel
• Symbol timing loop designed to acquire with large offsets. Negligible losses for ±100ppm offsets
• All internal clocks derived from single fixed frequency crystal (30MHz)
• Supports fast re-acquisition mode
• 6µs echo cancellation @ 5Mbaud
• Constellation points and equalizer tap values readable via I2C bus
• C/N estimation readable via I2C bus
• Low implementation loss for AWGN only: 0.5dB @ 64QAM (using internal 8-bit A/D); 0.3dB @ 256QAM (excluding A/D); measured at BER of 3x10–4 Pre R/S
• I = 12 and I = 204 de-interleaving
• Fast I2C bus compatible control interface
• Tuner IF-AGC output
• User programmable tuner RF-AGC output
• Dedicated 3-wire bus interface to configure up to 2 tuner synthesizers
• 3.3V CMOS technology
• Supports JTAG boundary scan
• 100-pin QFP package

Applications
    MMDS set-top boxes



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