3.3 V/5.0 VECL 1:15 Differential ÷1/÷2 Clock Driver

The MC100LVE222 is a low skew 1:15 differential ÷1/÷2 ECL fanout buffer designed with clock distribution in mind. The LVECL/LVPECL input signal pairs can be differential or used single−ended (with VBB output reference bypassed and connected to the unused input of a pair). Either of two fully differential clock inputs may be selected. Each of the four output banks of 2, 3, 4, and 6 differential pairs may be indwependently configured to fanout 1X or 1/2X of the input frequency. The LVE222 specifically guarantees low output to output skew. Optimal design, layout, and processing minimize skew within a device and from lot to lot.

• 200 ps Part−to−Part Skew
• 50 ps Output−to−Output Skew
• Selectable 1x or 1/2x Frequency Outputs
• ESD Protection: >2 kV HBM, >200 V MM
• The 100 Series Contains Temperature Compensation
• PECL Mode Operating Range: VCC/VCCO = 3.0 V to 5.25 V with VEE = 0 V
• NECL Mode Operating Range: VCC/VCCO = 0 V with VEE = −3.0 V to −5.25 V
• Internal Input Pulldown Resistors
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level 2 For Additional Information, refer to Application Note AND8003/D
• Flammability Rating: UL 94 V−0 @ 0.125 in, Oxygen Index: 28 to 34
• Transistor Count = 684 devices
• Pb−Free Packages are Available*